MIPI CSI-2 V3 RECEIVER INTERFACE IP

Description

The MIPI CSI-2 (Camera Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile applications. The MIPI CSI-2 provides the mobile industry a standard, robust, scalable, low-power, high-speed, cost-effective interface that supports a wide range of imaging solutions for mobile devices.

Features

  • Compliance as per MIPI-CSI-2 version3.0
  • Compliance with C-PHY 2.0 for MIPI CSI-2 Version3.0
  • Compliance with D-PHY 2.5 for MIPI CSI-2 Version3.0
  • Compatibility with I2C and I3C(SDR,DDR) for CCI interface
  • CSI-2 Receiver supports C-PHY 2.0/ D-PHY 2.5/ A-PHY/ M-PHY. Only one PHY layer can be configured at a time of transmission
  • Processor Interfaces are AHB Lite/APB/AXI for configuration
  • CSI-2 Receiver Supports Lane merging Function from N-Lanes and consolidate into complete packet for LLP
  • In D-PHY, CSI-2 Receiver will detect the de-skew pattern. On communication with low transmit frequencies, it will bypass the de-skew mechanism
  • In C-PHY, CSI-2 Receiver supports the sync word detection during payload reception
  • Pixel format supported are: YUV (420/422), RGB (888/666/565/555/444), RAW (6/7/8/10/12/14/16/20/24), Generic 8-bit long packet data types, user defined byte based data
  • Supports 16 Virtual channels for D-PHY and 32 Virtual channels for C-PHY
  • Supports error detection in data payload, data interleaving, scrambling and descrambling
  • Supports byte to pixel conversion in LLP layer

Block Diagram

mipi csi 2 v3 Receiver Interface IP

Application

  • Imaging
  • Surveillance
  • Gaming
  • Sensor devices
  • Internet of Things (IoT)
  • Wearable devices
  • Virtual Reality
  • Augmented Reality
  • Automotive Systems

Resource Deliverables

  • Verilog Source Code
  • User Guide
  • IP Integration Guide
  • Run and Synthesis Script
  • Encrypted Verification Test-bench Environment
  • Basic Test-suite