CPRI verification IP

MAXVY provides configurable CPRI TX/RX verification IP. MAXVY's CPRI verification IP is fully compatible with CPRI version v7.0 with backward compatibility to previous versions and provides an efficient and effective way to verify the component interfacing with CPRI interface of an IP.

FEATURES :

  • Compatible with CPRI version v7.0 as well as previous versions.
  • Transmitter/Receiver function
  • Supports line bit rates of CPRI specification
  • Supports 8B/10B & 64B/66bB line coding.
  • Supports scrambling/descrambling.
  • Supports both layers (i.e. PHY & Data link)and Service Access Point(SAP) for data link layer.
  • Supports Fast C&M channel and slow C&M channel
  • Supports L1 inband protocol and Performs L1 synchronization.
  • Supports RS-FEC and its features
  • Performs hyperframe framing.
  • Supports interface for vendor specific data into CPRI Frame.
  • Supports different IQ data sampling width and oversampling ratio
  • Error detection and reporting
  • Supports constraint randomization

Block Diagram

CPRI

Key Benefits

  • Available in Pure System Verilog and with UVM methodology Support.
  • Unique development methodology to ensure highest levels of quality.
  • Availability of Compliance & Regression Test Suites.
  • 24X5 customer support.
  • Unique and customizable licensing models.
  • Exhaustive set of assertions and coverage points with connectivity example for all the components.
  • Consistency of interface, installation ,operation and documentation across all our VIPs.

DELIVERABLES :

  • VIP user guide
  • Complete documentation of all class, task , function etc used in verification env.
  • CPRI VIP encrypted code
  • Sample Testbench Top
  • Built-in verification test plan includes-
    • Basic Protocol Tests
    • Random Tests
    • Assertions & Coverage model

ADVANTAGES :

  • Simple steps to integrate into customer environment
  • Fast,reusable and accurate
  • Supported on all industry-standard simulators
  • Complete verification plan, protocol coverage and checking
  • Availability in pure system verilog and UVM
  • Unique development to ensure highest level of quality
  • Configurable options like TX/RX.